1. Field of the Invention
The present invention relates to a semiconductor memory device having a burst operation function
2. Description of the Related Art
As recent portable electronic devices such as a cellular phone has been highly advanced, a data volume handled therein has been on the rise. Accordingly, there has been a demand for a work memory mounted in the portable electronic device to have a larger capacity. Conventionally, the portable electronic device has used a SRAM (Static Random Access Memory) as a work memory because of its easy system configurability. However, the SRAM has a drawback that it requires a larger number of elements to constitute one memory cell than a DRAM (Dynamic Random Access Memory), therefore, the SRAM is not suitable for use in devices requiring a larger capacity. In view of this, a semiconductor memory device called a pseudo SRAM having both a larger capacity of the DRAM and usability of the SRAM has been developed.
Generally, a semiconductor memory device with a memory core of the DRAM such as the pseudo SRAM has a burst operation function for realizing a high-speed access operation. For example, in the burst read operation, upon one read command input, internal addresses are sequentially generated with an external address inputted together with read command being set as an initial value, and data read from memory cells corresponding to the internal addresses are sequentially outputted in synchronization with an external clock signal.
Japanese Unexamined Patent Application Publication No. 2004-259400 and Japanese Unexamined Patent Application Publication No. 2000-207882 disclose techniques relating to the burst operation function of the semiconductor memory device, for example. In particular, Japanese Unexamined Patent Application Publication No. 2004-259400discloses a technique for realizing a burst operation with no limitation to a burst length. Japanese Unexamined Patent Application Publication No. 2000-207882 discloses a technique of improving memory access efficiency in a system controlling a plurality of SDRAMs (Synchronous DRAMs) by shortening a memory cycle when the burst operation function is used.
In the semiconductor memory device such as the pseudo SRAM, it is necessary to secure a certain length of time in a period from the deactivation of an external control signal for forcible termination of the burst read operation, up to the re-activation of the external control signal for start of a subsequent access operation. Note that the external control signal is a signal for instructing the start/end of the burst read operation (for example, a chip enable signal). Accordingly, a minimum standard value called recovery time is set for a deactivation period of the external control signal when the burst read operation is forcibly terminated. The recovery time, if long, gives an adverse effect to a high-speed access operation.
In the semiconductor memory device such as the pseudo SRAM, when the external control signal is deactivated in order to forcibly terminate the burst read operation during an activation period of a column selection signal supplied to a memory core, the column selection signal is kept activated for a certain length of time although it is unnecessary. Further, in the semiconductor memory device such as the pseudo SRAM, an operation state control signal is deactivated in response to the deactivation of the column selection signal after the securement of the time to ensure the operation of the memory core. Note that the operation state control signal is a signal for instructing the activation/deactivation of the memory core (for example, a row address strobe signal). The activation period of the column selection signal continues even after the deactivation of the external control signal, unnecessarily delaying the deactivation timing of the operation state control signal and lengthening an activation period of the memory core after the deactivation of the external control signal more than necessary. As a result, the recovery time at the forced termination of the burst read operation is elongated.